CGS 3269 - COMPUTER SYSTEMS ARCHITECTURE
SPRING 2002
COURSE SYLLABUS
Important Dates
Final Exam: April 23, 2002. 10 AM - 12:50 PM. For additional details, see the UCF Registrar's Final Exam Schedule website
Test # 2 Answer Key . Refer class slides for additional information.
Class Meets: Tuesday & Thursday at 11:30 am - 12:45 pm in ENGR2 102
Instructor
Vivek Bhatia
http://www.cs.ucf.edu/courses/cgs3269.spr2002
Office Hours:
Office - Computer Science Building,
CSB 207
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Monday |
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Tuesday |
1 PM - 2 PM |
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Wednesday |
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Thursday |
1 PM - 2 PM |
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Friday |
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TA
Feixue Han
Email: fhan@cs.ucf.edu
Office Hours: Monday, 2 - 4 PM, CSB 103
Grading
2 regular tests .................................. 100 points each
2-3 assignments .................................. 100 points (total)
Comprehensive final exam ......................... 100 points
The two tests and the final exam will each be worth 25% of the total grade and all the assignments combined will be worth the remaining 25% of the final grade. Final grades will be calculated on the basic 90/80/70/60 scale. Grades may be curved depending on the class performance. All assignments and homework will be posted to the course web site. Assignments must be turned in during class time on the day on which they are due.
Notes
· No calculators may be used on any tests in this course.
· All homework and course assignments will be posted to the course website. Lecture notes and additional handouts will also be on the website for you to print.
· Email submissions will not be accepted unless you have my prior permission.
Text: Structured Computer Organization, Fourth Edition, Andrew S. Tanenbaum, Prentice Hall, ISBN 0-13-095990-1
Course Topics
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COURSE TOPICS |
CLASS NOTES |
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Weeks 1 - 2 |
General overview of various architecture designs Five basic components of the PC architecture: CPU, memory, I/O, disk storage, programs Number systems: binary, octal, hexadecimal, and decimal Binary and Hex arithmetic |
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Week 3 |
Internal information - How data is stored in the PC Character representations in PCs, ASCII and Unicode |
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Weeks 4 -6 |
Transistors, gates, half adders, full adders The architecture of the PC Brief history of the evolution of various PC components Buses, BIOS, and motherboards |
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Weeks 7 - 8 |
Microprocessors CISC vs. RISC Architectures Superscalar speedup, pipelined FPUs, ALUs Micro-code, L1 and L2 Cache memory DMA channels, Internal clock speeds Chip fabrication technology and its evolution |
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TEST # 1 |
(03/21/02) |
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Weeks 9 - 10 |
Internal Memory RAM, ROM - erasable, programmable, erasable and programmable RAMBUS Technology Cache memory, direct-mapped, set-associative, fully-associative Cache memory address resolution, Cache memory replacement policies |
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Week 11 |
Error detection and correction in memory Hamming codes, SECDED codes External Memory (Disk storage and other storage media) RAID technology (Redundant Array of Inexpensive Disks) |
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Week 12 |
Instruction set design, Types of instructions Addressing techniques, registers, boundary alignment Exception handling, interrupts |
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Week 13 |
Bus technology, Expansion buses, PCI, AGP, ISA, EISA, VL, etc. Data lines, addressing lines, multiplexing Bus control, mastering, timing, sharing, burst modes |
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TEST # 2 |
(04/16/02) |
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Weeks 14 - 15 |
Introduction to other computer architectures Comparison of architectures, benchmarks, MIPS, FLOPS, MFLOPS Parallel processing, interconnection networks Pipelined processing SIMD architectures, MIMD architectures, stack machines Vector processors |
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FINAL EXAM |
(04/23/02) |
Assignments
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Specification |
Assigned Date |
Due Date |
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Assignment # 1 |
January 7 |
January 17 |
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Assignment # 2 |
March 7 |
March 19 |