COP 3402 meeting -*- Outline -*-

* Virtual Machines

   Q: What is a Virtual Machine?
       It's a software-based computer
       It's an instruction interpreter

------------------------------------------
            HOW A VM WORKS

                  runtime inputs
                        |
                        v
   [--------]     [------------]
   | BOF    | --> |     VM     | -> trace
   [--------]     [------------]   output
                        |
                        v
                  runtime outputs
------------------------------------------

   Q: Where does the BOF come from?
       A compiler or assembler

   Q: What's the equivalent of a BOF on your machine?
       An executable, on Windows a .exe file
       
** instruction set architecture
------------------------------------------
  KINDS OF INSTRUCTION SET ARCHITECTURES

CISC =




RISC = 





------------------------------------------

    ... Complex Instruction Set Computer
        (x86)
      - Hundreds of instructions
      - Instruction do several things at once
            (e.g., set condition codes...)
      - Difficult to manufacture to be fast
            (lots of caching, etc.)

      - Easier to program in assembler
      - Compilers must pick best instructions

    ... Reduced Instruction Set Computer
        (MIPS)
      - Each instruction does a simple job
      - Simple to manufacture,
      - Easy to make fast

      - Tedious to program in assembler
      - Compilers must do a lot

------------------------------------------
     ISA = INSTRUCTION SET ARCHITECTURE

Accumulator-based (Montagne's Tiny VM):

  Instructions work on accumulator
                       and memory

  SUB addr
      means
        accum <- accum - memory[addr]



Register-based (MIPS):

  Computation in the registers

  SUB $r1,$r2,$r3
      means
         GPR[$r1] <- GPR[$r2] - GPR[$r3]



------------------------------------------

      ... limited support for subroutines


      ... register dedicated to:

           return address for calls

           stack pointer for runtime stack
           frame pointer for runtime stack


** Simple Stack Machine, a RISC-like stack machine
------------------------------------------
      SSM MEMORY AND REGISTERS

          
addrs        memory        GPRs   Special
32768  [---------------]          
       |     ...       |          
     { [               ] <- FP
   AR{ |     ...       |
     { [               ] <- SP
       |vvvvvvvvvvvvvvv|
       |     ...       ]
       |               |
       |---------------|
global |               |
  data [               ] <- GP
       |      ...      |
       |               |        
instrs [               ] <-----  PC  
       |               |
    0  [---------------]        
                                 HI
                                 LO

        MACHINE CYCLE

1. Fetch instruction at PC
2. Increment PC  (PC <- PC + 1)
3. Execute that instruction
------------------------------------------
        Note that the PC is incremented *before* execution
        of each instruction!
       
------------------------------------------
         ISA OF THE SSM


Words are 32 bits (ints)

Word-addressible:

 LWR t,s,o  is GPR[t] <- memory[GPR[s]+o]

Dedicated registers:

                         Assembly
  Num  Role              Name
 =============================
   0   globals pointer   $gp
   1   stack pointer     $sp
   2   frame pointer     $fp
   ...                   $3-$6
   7   return address    $ra

Stack grows downwards,
   towards lower addresses

Location-based instructions:

  ADD t,ot,s,os  means

    memory[GPR[t]+ot]
       <- memory[GPR[SP]]
          + memory[GPR[s] + GPR[os]]

  ADDI r,o,i     means

    memory[GPR[r]+o]
       <- memory[GPR[r] + o] + i

------------------------------------------
    Q: Is the x86 a RISC or CISC design?
       definitely CISC

------------------------------------------
         SPECIAL REGISTERS

Special registers:

   PC  program counter
   HI  high bits of multiplication
   LO  low bits of multiplication
   
 PC is changed by:
    - jump instructions
    - branch instructions
    - CALL, CSI, and RTN instructions
------------------------------------------

   (Show the SSM Manual)
      - The BOF layout
      - The instruction tables (appendix A)
      - The hints

    Q: What would you do to add the top of the stack to itself
         and put the result in a new word on top of the stack?

        ADD $sp, -1, $sp, 0

        which does

           memory[GPR[$sp]+-1] <- memory[GPR[$sp]] + memory[GPR[$sp]+0]

    It's RISC-like in that the instructions need to explicitly
         manipulate the stack

        SRI $sp, 1  means GPR[$sp] <- GPR[$sp]-1

    In the SSM, the compiler needs to put instructions together
       to do more complex things...

        ADD $sp, -1, $sp, 0
        SRI $sp, 1

    The top of the stack is a location ($sp, 0)
        so is all the rest of the memory,
    But the top of stack is implicitly used in artihmetic